Reconfigurable Systems Summer Institute  
 

Are you looking for the 2012 Symposium on Application Accelerators in High-Performance Computing (SAAHPC'12)? Go to: www.saahpc.org.

RSSI Agenda

Monday, July 7, 2008

Reconfigurable Computing Tutorial: The tutorial will provide an overview of the state of the art in reconfigurable computing technology, development tools, and applications and will focus on cross-platform application development for reconfigurable computing systems.


The primary audience for the tutorial is advanced undergraduate and graduate students who are interested in learning about how to get started with developing reconfigurable computing applications.

8:00am - 8:30am
Registration and breakfast
8:30am - 10:00am
Introduction to Reconfigurable Computing: This session will serve as an introduction to the field of reconfigurable computing. It will survey basic concepts such as field-programmable gate arrays, dataflow, pipelining, etc. Examples of modern reconfigurable computing systems and an overview of application development tools will be presented. The session will conclude with the application development methodology and a few examples of applications implemented on various reconfigurable computing platforms.
Instructors: Volodymyr Kindratenko and Craig Steffen, NCSA
10:00am - 10:30am
Break
10:30am - noon
Introduction to AutoPilot from AutoESL for C/C++/SystemC to RTL synthesis for FPGA implementation: This session will introduce the AutoPilot design flow from C/C++/SystemC to RTL for FPGA implementation. The basic concepts of C-based FPGA design will be covered, including mapping from untimed to timed model, pipelining, interface synthesis, etc.
Instructor: Zhiru Zhang
Noon - 1:00pm
Lunch
1:00pm - 2:00pm
Examples of applications implemented in AutoPilot for FPGA accelerators: In this session, the use of AutoPilot design flow will be demonstrated on real-life applications.
Instructor: Zhiru Zhang
2:00pm - 2:30pm
Break
2:30pm - 4:00pm
Getting started with Impulse-C: This session will focus on software-to-hardware compilation tools and techniques, including pipeline optimization and instruction parallelism, using the Impulse C tools. The session will include descriptions of various parallel programming methods, including communicating parallel processes, data streaming, and shared memories. Examples of C-language code optimization and cycle-accurate debugging, as well as platform-specific hardware generation, will be presented. Applications will include image processing, DSP and stochastic (Monte Carlo) simulations. Multiple FPGA-based hardware platforms will be discussed and demonstrated.
Instructor: David Pellerin
4:00pm - 4:30pm
Break
4:30pm - 5:30pm
Advanced Impulse-C
David Pellerin
5:45pm
Tour of NCSA machine room (sign-up sheet available at registration desk)

Tuesday, July 8, 2008
8:00am
Registration and continental breakfast
8:30am - 10:00am
Opening Session
Chair: Rob Pennington, NCSA deputy director.

Opening remarks from NCSA Director Thom Dunning and Charles Zukoski, vice chancellor for research, University of Illinois at Urbana-Champaign

Keynote address: Reconfigurable Computing: It's Like Deja-vu All Over Again
José Muñoz, National Science Foundation Office of Cyberinfrastructure
10:00am - 10:30am
Break
10:30am - noon
Technology
Chair: Volodymyr Kindratenko, NCSA.

Computational Density of Fixed and Reconfigurable Multi-Core Devices for Application Acceleration
Jason Williams, Alan D. George, Justin Richardson, Kunal Gosrani, Siddarth Suresh, NSF CHREC Center, University of Florida

RAMP Blue: Implementation of a Manycore 1008 Processor System
D. Burke, J. Wawrzynek, K. Asanovic, A. Krasnov, A. Schultz, G. Gibeling, P.-Y. Droz, University of California, Berkeley

Exhibitor presentations
Impulse, Cebatech, Pico Computing, AlphaData, AutoESL, OptNGN
Noon - 1:30pm
Lunch
Vendor exhibits open
1:30pm - 3:00pm
Technology
Chair: Herman Lam, University of Florida

Foundation for FPGA Acceleration
Martin Langhammer, Altera

Building HPC applications Using Intel® QuickAssist Technology - Accelerator Abstraction Layer Software
Joe Grecco, Intel

Some Challenges for Accelerated Computing
Jay Owen, AMD
3:00pm - 3:30pm
Break
Vendor exhibits open
3:30pm - 5:30pm
Compilers and Optimization
Chair: Eric Stahlberg, Wittenberg University

Parallel Programming of High-Performance Reconfigurable Computing Systems with Unified Parallel C
Tarek El-Ghazawi, Olivier Serres, Samy Bahra, Miaoqing Huang and Esam El-Araby, The George Washington University

LLVM-CHiMPS: Compilation Environment for FPGAs Using LLVM Compiler Infrastructure and CHiMPS Computational Model
Seung Jae Lee, David Raila, Volodymyr Kindratenko, NCSA, University of Illinois

SRC MAPstation™ Image Processing: Edge Detection
David Caliga, SRC Computers

Poster Presentations
5:30pm - 7:30pm
Reception, posters, and exhibits
SCAN Cryptoprocessor
Raghudeep Kannavara, Nikolaos Bourbakis, Apostolos Dollas, Wright State University

Inquiry: Robust Facial Recognition with Reconfigurable Platforms
Andrew Kruzner, Jack Merwin, Derek Rollend, Ananth Nallamuthu, Chirag Gupta, Melissa C. Smith, Clemson University

Evaluation of a Dynamic Load-Balancing Molecular Dynamics Application using Automated HW/SW Architecture Generation
Christopher Rogers, Matthew Areno, Brandon Eames, Utah State University

Implementing Closed-Form Expressions on FPGAs Using the NAL, with Comparison to CUDA GPU and Cell BE Implementations
Robin Bruce, Javier Setoain, Richard Chamberlain, Malachy Devlin, Rosa M. Badia, Nallatech

Implementation of a CORDIC-based Double Precision Exponential Core on an FPGA
Robin Pottathuparambil, Ron Sass, University of North Carolina-Charlotte

A Methodology for Deriving an Efficient, Application-Specific, FPGA-Based Pipelined Processor
Jonathan Phillips, Aravind Dasu, Utah State University

Evaluation of two-electron repulsion integrals over Gaussian basis functions on SRC-6 reconfigurable computer
Volodymyr Kindratenko, Ivan Ufimtsev, and Todd Martínez, NCSA, University of Illinois

Experiences on 64 and 150 FPGA Systems
Olaf Storaasli, Dave Strenski, Oak Ridge National Laboratory

MP3 decoding on FPGA: A case study for floating point acceleration
Alex Papakonstantinou, Yohannes Kifle, Gregory Lucas, Deming Chen, University of Illinois

5:45pm - Tour of NCSA machine room (sign-up sheet available at registration desk)
Wednesday, July 9, 2008
8:00am
Registration and continental breakfast
8:30am - 10:00am
Systems
Chair: Craig Steffen, NCSA

The Importance of Data Centricity in an Increasingly Parallel Computing World
Allan Cantle, Nallatech

This Year at SRC: Dr. George is Right
Jon Huppenthal, SRC Computers

Accelerators in Commercial Clusters
Chris Lindahl, SGI
10:00am - 10:30am
Break
Vendor exhibits open
10:30am - noon
Algorithms and Applications
Chair:Volodymyr Kindratenko, NCSA

Computing Models for FPGA-Based Accelerators
Martin Herbordt, Yongfeng Gu, Tom VanCourt, Josh Model, Bharat Sukhwani, Matt Chiu, Boston University

Divide-and-Conquer Approach for Designing Large-operand Functions on Reconfigurable Computers
Miaoqing Huang, Esam El-Araby, Tarek El-Ghazawi, The George Washington University

Computed Tomography (CT) Scan Image Reconstruction on the SRC-7
David Pointer, SRC Computers
Noon - 1:30pm
Lunch

OpenFPGA-Sponsored Event

1:30pm - 5:00pm
OpenFPGA session
Chair: Eric Stahlberg, Wittenberg University

Institute for Advanced Computing Applications and Technologies-Sponsored Workshop

5:00pm - 7:00pm
Opening Reception
Workshop on Programming Massively Parallel Processors (PMPP)
(You must register separately for PMPP)
Thursday, July 10, 2008

Institute for Advanced Computing Applications and Technologies-Sponsored Workshop

8:30am - 5:00pm
Workshop on Programming Massively Parallel Processors (PMPP)
(You must register separately for PMPP)

 

Questions? Contact ask@rssi2008.org. RSSI is organized by the National Center for Supercomputing Applications, the University of Manchester, the NSF Center for High-Performance Reconfigurable Computing, and OpenFPGA.


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